Beschreibung
CDI to 100% immediately or to be agreed.
Postulation uniquement en ligne - merci de mentionner sous source (ORP)
Challenges are our drive, innovation our calling. We at Kandou are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just the customers of today, but of tomorrow too. If you love to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an opportunity for you.
We are actively seeking a Analog Design Engineer, based in Switzerland - Lausanne.
Key Responsibilities
Position in design, modeling, and verification of custom analog designs for high-speed serdes transceivers in advanced technology nodes
Design and verification of analog circuits, following prescribed design and documentation flows, to meet architecture specifications
If necessary, support and interact with customers on requirements, design specifications, performance results and product delivery
Support analog IP and chip level integration
Collaborate with architects, technical leads, analog and digital design, layout, integration, verification, silicon validation and quality teams as needed
Competencies
Skilled in the design of high speed analog serdes circuits including DFT, DFM and ESD protection, with a deep knowledge of transistor and wireline communications fundamentals
Understanding of layout approaches and design techniques used for high-speed and high precision circuits
Advanced user of EDA tools for design and verification of analog circuits, preferably using the Cadence Virtuoso environment, including their use for simulation, parasitic extraction, electromagnetic modelling, EM/IR and reliability analysis as well as LVS and DRC
Self-motivated, a strong sense of ownership and responsibility with good verbal and written communication skills and a team player
Ability to manage and complete designs to schedule using defined design process flows as well as reporting design status to internal management team
Requirements
The candidate should have a Master's or Ph.D. degree in Electronics or other relevant fields
Minimum 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi tone communications such as equalizers, clock generators, clock and data recovery circuits, TISAR ADC’s, serialisers and output drivers etc.
Expertise in design and layout of high-speed circuits such as oscillators, phase-locked loops, delay-locked loops, and other fundamental building blocks like biasing, amplifiers, buffers, regulators, filters, ADC, DAC etc.
Experience with modern semiconductor process technologies, preferably in finFet technology nodes
Experience using Ocean, MDL or equivalent to automate analog design verification is highly desirable
If this is the role you have been looking for and want to be part of a growing company with an exciting future, we would really love to hear from you. Together We Kandou It!
Visit us at www.kandou.ai and https://www.linkedin.com/company/kandou-ai/